TSMC Eyes One-Trillion Transistor GPU by 2034 with 3D Chip Tech

  • TSMC chairman Mark Liu and chief scientist H.-S. Philip Wong believe a one-trillion transistor GPU can be built by 2034 using 3D chiplet stacking.
  • Currently, the largest chip size is limited by the reticule limit, around 800mm2. Chiplets would allow transistors to be spread across multiple chips.
  • 3D stacking would allow for more transistors to be stacked on top of each other.
  • Other companies, like Nvidia, are already using chiplets.
  • Intel’s CEO Pat Gelsinger believes he can achieve a similar feat by 2030.

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